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blog: home logic: more explicitly break down the inverter chain diagrams

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colin 2022-07-12 01:42:22 -07:00
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content/blog/DRAFT-2022-05-26-home-built-computation/index.md
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@ -242,11 +242,11 @@ but it's not that simple: we have a few stray signals we need to look closer at
consider the case where all cores are polarized CW (logic '1'), below
(the circular arrows in the center of each core indicates its polarization).
![TODO](inverter-chain-naive-trigger-pre.svg)
![](inverter-chain-naive-trigger-pre.svg)
then we apply a positive pulse to core S1 in order to force it into the CCW state:
![TODO](inverter-chain-naive-trigger-early.svg)
![](inverter-chain-naive-trigger-early.svg)
as S1 transitions from CW to CCW polarization, it dumps current as shown onto the wires connected to it.