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app: stacked_cores: define 49-xx: a *typo'd* multi-stage inverter with parameterized conductivities

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in fact, M2 is initialized improperly: this actually acts as an
(overpowered) single-clock-cycle inverter.
This commit is contained in:
colin
2022-10-24 21:46:39 -07:00
parent 3e331db374
commit 3f54b25cf1
3 changed files with 134 additions and 10 deletions
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30
crates/applications/stacked_cores/scripts/plot_inverters.py
View File

@@ -17,6 +17,10 @@ class SimParamsCascaded(SimParams):
def human_name(self) -> str:
return f"Cascade: {self.p1.human_name} -> {self.p2.human_name}"
from_params = lambda l: [
(p, get_meas(p)) for p in l if get_meas(p)
]
# plot pre-40xx sims
for (name, curve) in [
@@ -93,7 +97,7 @@ of_interest = []
# ]
# ]
of_interest += [(p, get_meas(p)) for p in
of_interest += from_params(
[
# SimParams41(4, 3, 400, "2e10"),
# SimParams41(4, 3, 400, "4e10"),
@@ -126,12 +130,12 @@ of_interest += [(p, get_meas(p)) for p in
# SimParams41(9, 1, 400, "5e9"),
# SimParams41(9, 1, 400, "1e10"),
# SimParams41(9, 1, 400, "2e10"),
] if get_meas(p)
]
]
)
all_viable_inverters = filter_meas(viable_inverter=True);
# inverters with steepest starting slope
inverters_with_steepest_slope0 = [(p, get_meas(p)) for p in
inverters_with_steepest_slope0 = from_params(
[
SimParams48(5e2, 4e4, 4000, 200, 9, 1, 400, "1e10"),
# SimParams48(5e2, 2e4, 2000, 100, 9, 1, 400, "1e10"),
@@ -142,9 +146,10 @@ inverters_with_steepest_slope0 = [(p, get_meas(p)) for p in
SimParams41(16, 2, 800, "1e10"),
SimParams41(12, 2, 600, "1e10"),
]
]
)
_47xx_all = filter_meas(run="47")
_48xx_all = filter_meas(run="48")
_48xx_study = [(p, get_meas(p)) for p in
_48xx_study = from_params(
[
# T0: y0=0.62, slope0=1.4 until x=0.20
SimParams48(5e2, 1e4, 1000, 50, 9, 1, 400, "1e10"),
@@ -182,7 +187,14 @@ _48xx_study = [(p, get_meas(p)) for p in
# y0=0.62, slope0=1.3 until x=0.20
SimParams48(5e2, 1e5, 10000, 500, 9, 1, 400, "5e9"),
]
]
)
_49xx_study = from_params(
[
SimParams47(5, 1, 400, "1e10"),
SimParams49(5e2, 1e4, 1000, 50, 5, 1, 400, "1e10"),
]
)
@@ -201,7 +213,9 @@ _48xx_study = [(p, get_meas(p)) for p in
# of_interest += filter_meas(run="48", coupling_cond=1e4, drive=5e9)
# of_interest += inverters_with_steepest_slope0
of_interest += _48xx_study
# of_interest += _47xx_all
# of_interest += _48xx_study
of_interest += _49xx_study
# plot cascaded inverter -> buffer
# for (inv_p, inv_curve) in filter_meas(is_inverter=True):

43
crates/applications/stacked_cores/scripts/stacked_cores_40xx_db.py
View File

@@ -171,7 +171,10 @@ class SimParams47(SimParams):
def t_mid(self) -> float:
return 4e-9
class SimParams48(SimParams):
class SimParamsV3(SimParams):
"""
SimParams where the conductivities and clock length are configurable
"""
def __init__(
self,
control_cond: int,
@@ -206,6 +209,7 @@ class SimParams48(SimParams):
name = super().human_name
return f"{name} ({self.clock_length_ps}ps {self.control_cond}/{self.coupling_cond} cond)"
class SimParams48(SimParamsV3):
@property
def run(self) -> str:
return "48"
@@ -214,6 +218,23 @@ class SimParams48(SimParams):
def is_inverter(self) -> bool:
return False
class SimParams49(SimParamsV3):
@property
def run(self) -> str:
return "49"
@property
def is_inverter(self) -> bool:
return False
@property
def t_last(self) -> float:
return 5e-12 * self.clock_length_ps
@property
def t_mid(self) -> float:
return 4e-12 * self.clock_length_ps
sims = [
# params, human friendly db name, normalization
(SimParams40(6, 1, 400, "5e10"), "fwd_40_6_3_1_5e10", 17000),
@@ -404,6 +425,8 @@ sims = [
(SimParams48(5e2, 1e5,10000, 500, 9, 1, 400, "1e10"), None, 20000),
(SimParams48(5e3, 5e4,10000, 500, 9, 1, 400, "5e8"), None, 20000),
(SimParams48(5e3, 5e4,10000, 500, 9, 1, 400, "1e9"), None, 20000),
(SimParams49(5e2, 1e4, 1000, 50, 5, 1, 400, "1e10"), None, 20000),
]
measurements = { real.machine_name: [human, norm, None, None] for (real, human, norm) in sims }
@@ -4819,4 +4842,22 @@ Piecewise(
)
""")
set_meas("49-0.0004rad-500ctl_cond-10000coupling_cond-1000ps-50ps-5ctl-5coupling-3_1_winding-1e10-drive", """
Piecewise(
[
[ -17425, -14614 ], # -1.000, M1=-12327
[ -16995, -14581 ], # -0.350, M1=-12187
[ -16407, -14537 ], # -0.300, M1=-12007
[ -13065, -14308 ], # -0.250, M1=-11112
[ -11921, -14219 ], # -0.240, M1=-10782
[ -9616, -14046 ], # -0.220, M1=-10146
[ -7293, -13863 ], # -0.200, M1=-9494
[ -4961, -13662 ], # -0.180, M1=-8800
[ -1448, -13371 ], # -0.150, M1=-7820
[ 10233, -12281 ], # 0.000, M1=-4587
[ 16749, -11617 ], # 1.000, M1=-2827
]
)
""")
if __name__ == '__main__': main()

71
crates/applications/stacked_cores/src/main.rs
View File

@@ -5103,7 +5103,7 @@ fn main() {
}
}
if true {
if false {
for init_set in [
&[
// targeted for (5e2, 5e3, ps(1000), ps(50), 9, 1, um(400), 1e10)
@@ -5407,6 +5407,75 @@ fn main() {
}
}
}
if true {
for init_set in [
&[
// establish the domain/range
1.00,
-1.00,
][..],
&[
0.00,
-0.20,
-0.35,
-0.25,
-0.30,
-0.15,
-0.10,
0.20,
0.10,
0.35,
][..],
] {
for (ctl_cond, coupling_cond, clock_duration, clock_decay, coupling_loops, s0_loops, s_major, cur_flt) in [
(5e2, 1e4, ps(1000), ps(50), 5, 1, um(400), 1e10),
// old 47-xx runs
// (5e2, 5e3, ps(1000), ps(50), 5, 1, um(400), 1e10),
// (5e2, 5e3, ps(1000), ps(50), 7, 1, um(600), 8e9),
// (5e2, 5e3, ps(1000), ps(50), 7, 1, um(600), 1e10),
// (5e2, 5e3, ps(1000), ps(50), 7, 1, um(600), 2e10),
// (5e2, 5e3, ps(1000), ps(50), 7, 1, um(600), 5e9),
// (5e2, 5e3, ps(1000), ps(50), 7, 1, um(600), 3e10),
// (5e2, 5e3, ps(1000), ps(50), 5, 1, um(400), 5e9),
// (5e2, 5e3, ps(1000), ps(50), 4, 2, um(600), 2e10),
// (5e2, 5e3, ps(1000), ps(50), 4, 2, um(600), 5e10),
// (5e2, 5e3, ps(1000), ps(50), 5, 1, um(400), 8e9),
// (5e2, 5e3, ps(1000), ps(50), 5, 1, um(400), 2e10),
// (5e2, 5e3, ps(1000), ps(50), 5, 1, um(400), 4e10),
] {
for &init_flt in init_set {
// coupling loops (M0 -> M1) + (M1 -> M2) + control slots
let slots_per_asym = 2*s0_loops;
let net_slots = 2*slots_per_asym + 1;
let mut params = params_v2
.with_clock_phase_duration(clock_duration)
.with_clock_decay(clock_decay)
.with_ctl_conductivity(ctl_cond)
.with_coupling_conductivity(coupling_cond)
.with_s_major(s_major)
.with_coupling_loops(coupling_loops)
.with_input_magnitude(cur_flt)
// control loops
.with_coupling(0, 0, 0, net_slots, CouplingMethod::Control)
.with_coupling(1, 1, 0, net_slots, CouplingMethod::Control)
.with_coupling(2, 2, 0, net_slots, CouplingMethod::Control)
;
params = couple_asymmetric_buffer(&params, 0 /* sender core */, s0_loops, 1 /* slot offset */, net_slots);
params = couple_asymmetric_buffer(&params, 1 /* sender core */, s0_loops, 1 + slots_per_asym /* slot offset */, net_slots);
let name = asymmetric_inverter_name_v3(
&params, "49", coupling_loops /* ctl loops */, coupling_loops, 2*s0_loops + 1, init_flt
);
run_sim(
&name,
drive_map_3stack_with_init_buff_cascade(init_flt),
params,
);
}
}
}
}
}