app: stacked_cores: DriveStrength: Fold {Hold,Release}{Low,High} into just {Fold,Release}
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@@ -29,26 +29,30 @@ type Sim = SpirvSim::<R, Mat, Backend>;
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/// different states each control signal can be in for some clock cycle.
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/// different states each control signal can be in for some clock cycle.
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#[derive(Copy, Clone)]
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#[derive(Copy, Clone)]
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enum ClockState {
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enum ClockState {
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HoldHigh(f32),
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Hold(f32),
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ReleaseHigh(f32),
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Release(f32),
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HoldLow(f32),
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ReleaseLow(f32),
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Float,
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Float,
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}
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}
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type ClockSegment = Shifted<R, Gated<R, Scaled<Exp<R>, R>>>;
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type ClockSegment = Shifted<R, Gated<R, Scaled<Exp<R>, R>>>;
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impl ClockState {
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impl ClockState {
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fn hold(amp: f32) -> Self {
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Self::Hold(amp)
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}
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fn hold_high() -> Self {
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fn hold_high() -> Self {
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Self::HoldHigh(1.0)
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Self::hold(1.0)
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}
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}
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fn hold_low() -> Self {
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fn hold_low() -> Self {
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Self::HoldLow(1.0)
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Self::hold(-1.0)
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}
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fn release(amp: f32) -> Self {
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Self::Release(amp)
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}
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}
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fn release_high() -> Self {
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fn release_high() -> Self {
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Self::ReleaseHigh(1.0)
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Self::release(1.0)
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}
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}
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fn release_low() -> Self {
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fn release_low() -> Self {
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Self::ReleaseLow(1.0)
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Self::release(-1.0)
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}
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}
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fn float() -> Self {
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fn float() -> Self {
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Self::Float
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Self::Float
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@@ -58,10 +62,8 @@ impl ClockState {
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{
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{
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use ClockState::*;
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use ClockState::*;
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match self {
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match self {
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&HoldHigh(amp) => Some(params.control_signal_hold(cycle, amp)),
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&Hold(amp) => Some(params.control_signal_hold(cycle, amp)),
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&ReleaseHigh(amp) => Some(params.control_signal_release(cycle, amp)),
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&Release(amp) => Some(params.control_signal_release(cycle, amp)),
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&HoldLow(amp) => Some(params.control_signal_hold(cycle, -amp)),
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&ReleaseLow(amp) => Some(params.control_signal_release(cycle, -amp)),
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Float => None,
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Float => None,
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}
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}
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}
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}
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@@ -243,13 +245,13 @@ fn drive_map_isolated_inv() -> [[ClockState; 2]; 6] {
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}
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}
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#[allow(unused)]
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#[allow(unused)]
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fn drive_map_3stack() -> [[ClockState; 3]; 6] {
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fn drive_map_3stack_with_init_amp(amp: f32) -> [[ClockState; 3]; 6] {
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use ClockState as C;
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use ClockState as C;
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[
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[
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// charge S1 to '1', S0/S2 to '0'
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// charge S1 to '1', S0/S2 to '0'
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[C::hold_low(), C::hold_high(), C::hold_low() ],
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[C::hold_low(), C::hold(amp), C::hold_low() ],
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// let the cores settle
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// let the cores settle
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[C::release_low(), C::release_high(),C::release_low()],
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[C::release_low(), C::release(amp), C::release_low()],
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// write S1 -> S0/S2. S0/S2 should be copied to 1
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// write S1 -> S0/S2. S0/S2 should be copied to 1
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[C::float(), C::hold_low(), C::float() ],
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[C::float(), C::hold_low(), C::float() ],
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@@ -262,6 +264,11 @@ fn drive_map_3stack() -> [[ClockState; 3]; 6] {
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]
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]
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}
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}
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#[allow(unused)]
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fn drive_map_3stack() -> [[ClockState; 3]; 6] {
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drive_map_3stack_with_init_amp(1.0)
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}
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#[allow(unused)]
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#[allow(unused)]
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fn drive_map_3stack_and_rev() -> [[ClockState; 3]; 6] {
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fn drive_map_3stack_and_rev() -> [[ClockState; 3]; 6] {
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use ClockState as C;
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use ClockState as C;
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