spirv: re-order the SimBackend parameters to be more consistent
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@@ -13,14 +13,14 @@ impl<R: Real, M: Material<R>> SimBackend<R, M> for CpuBackend {
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}
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fn step_n(
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&self,
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num_steps: u32,
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meta: SimMeta<R>,
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mat: &[M],
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stim_e: &[Vec3<R>],
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stim_h: &[Vec3<R>],
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mat: &[M],
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e: &mut [Vec3<R>],
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h: &mut [Vec3<R>],
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m: &mut [Vec3<R>],
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num_steps: u32,
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) {
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for _ in 0..num_steps {
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// step E field
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@@ -63,14 +63,14 @@ impl<R: Copy, M: Send + Sync + HasEntryPoints<R>> SimBackend<R, M> for WgpuBacke
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fn step_n(
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&self,
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num_steps: u32,
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meta: SimMeta<R>,
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mat: &[M],
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stim_cpu_e: &[Vec3<R>],
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stim_cpu_h: &[Vec3<R>],
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mat: &[M],
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e: &mut [Vec3<R>],
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h: &mut [Vec3<R>],
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m: &mut [Vec3<R>],
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num_steps: u32,
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) {
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let field_bytes = meta.dim.product_sum() as usize * std::mem::size_of::<Vec3<f32>>();
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@@ -16,18 +16,24 @@ mod gpu;
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pub use cpu::CpuBackend;
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pub use gpu::WgpuBackend;
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/// while the SpirvSim type owns all the stateful data,
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/// it dispatches to a pluggable backend for advancing that state.
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///
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/// this backend type abstracts over the specific compute used to advance the state.
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/// it could advance the state locally, on the CPU,
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/// or it could dispatch to a SPIR-V device, like a GPU.
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pub trait SimBackend<R, M> {
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fn new(volume: u64) -> Self;
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fn step_n(
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&self,
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num_steps: u32,
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meta: SimMeta<R>,
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mat: &[M],
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stim_e: &[Vec3<R>],
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stim_h: &[Vec3<R>],
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mat: &[M],
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e: &mut [Vec3<R>],
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h: &mut [Vec3<R>],
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m: &mut [Vec3<R>],
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num_steps: u32,
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);
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}
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@@ -137,14 +143,14 @@ where
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let (stim_e, stim_h) = self.eval_stimulus(stim);
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let backend = &**self.backend.as_ref().unwrap();
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backend.step_n(
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num_steps,
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self.meta,
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self.mat.as_slice(),
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stim_e.as_slice().unwrap(),
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stim_h.as_slice().unwrap(),
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self.mat.as_slice(),
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self.e.as_mut_slice(),
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self.h.as_mut_slice(),
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self.m.as_mut_slice(),
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num_steps,
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);
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self.step_no += num_steps as u64;
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}
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