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spirv: test: port conductor tests to backend_agnostic

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This commit is contained in:
colin
2022-07-25 22:23:56 -07:00
parent 3fa2c22438
commit dc49cddc97
1 changed files with 45 additions and 38 deletions
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83
crates/coremem/src/sim/spirv/mod.rs
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@@ -444,6 +444,41 @@ mod test {
test_same::<B>(0x1234, 100, 10, Index::new(24, 20, 44));
}
fn test_same_conductor<B: SimBackend<f32, FullyGenericMaterial<f32>> + Send + Sync>(
seed: u64, step_iters: u64, steps_per_iter: u32, size: Index
) {
use rand::{Rng as _, SeedableRng as _};
let mut rng = rand::rngs::StdRng::seed_from_u64(seed);
let mut ref_state = SimState::new(size, 1e-3);
let mut dut_state = SpirvSim::<f32, FullyGenericMaterial<f32>, B>::new(size, 1e-3);
for z in 0..size.z() {
for y in 0..size.y() {
for x in 0..size.x() {
let cond = Vec3::new(
rng.gen_range(0.0..1e6),
rng.gen_range(0.0..1e6),
rng.gen_range(0.0..1e6),
);
ref_state.put_material(Index::new(x, y, z), AnisomorphicConductor::new(cond.cast()));
dut_state.put_material(Index::new(x, y, z), AnisomorphicConductor::new(cond.cast()));
}
}
}
ref_state.apply_stimulus(&RngStimulus::new(seed));
dut_state.apply_stimulus(&RngStimulus::new(seed));
test_same_explicit(ref_state, dut_state, step_iters, steps_per_iter);
}
pub fn do_conductor_1_step<B: SimBackend<f32, FullyGenericMaterial<f32>> + Send + Sync>() {
test_same_conductor::<B>(0x1234, 1, 1, Index::new(4, 4, 4));
}
pub fn do_conductor_many_steps_larger<B: SimBackend<f32, FullyGenericMaterial<f32>> + Send + Sync>() {
test_same_conductor::<B>(0x1234, 100, 10, Index::new(96, 16, 8));
}
}
macro_rules! test_backend {
@@ -504,6 +539,14 @@ mod test {
fn same_100_steps_of_10() {
do_same_100_steps_of_10::<$backend>();
}
#[test]
fn conductor_1_step() {
do_conductor_1_step::<$backend>();
}
#[test]
fn conductor_many_steps_larger() {
do_conductor_many_steps_larger::<$backend>();
}
}
}
}
@@ -819,44 +862,6 @@ mod test {
}
}
fn test_same_conductor(seed: u64, step_iters: u64, steps_per_iter: u32, size: Index) {
use rand::{Rng as _, SeedableRng as _};
let mut rng = rand::rngs::StdRng::seed_from_u64(seed);
let mut ref_state = SimState::new(size, 1e-3);
let mut dut_state: SpirvSim = SpirvSim::new(size, 1e-3);
for z in 0..size.z() {
for y in 0..size.y() {
for x in 0..size.x() {
let cond = Vec3::new(
rng.gen_range(0.0..1e6),
rng.gen_range(0.0..1e6),
rng.gen_range(0.0..1e6),
);
ref_state.put_material(Index::new(x, y, z), AnisomorphicConductor::new(cond.cast()));
dut_state.put_material(Index::new(x, y, z), AnisomorphicConductor::new(cond.cast()));
}
}
}
ref_state.apply_stimulus(&RngStimulus::new(seed));
dut_state.apply_stimulus(&RngStimulus::new(seed));
test_same_explicit(ref_state, dut_state, step_iters, steps_per_iter);
}
// TODO: port the rest of these tests to the test_backend macro
#[test]
fn conductor_1_step() {
test_same_conductor(0x1234, 1, 1, Index::new(4, 4, 4));
}
#[test]
fn conductor_many_steps_larger() {
test_same_conductor(0x1234, 100, 10, Index::new(96, 16, 8));
}
fn test_same_mb_ferromagnet(seed: u64, step_iters: u64, steps_per_iter: u32, size: Index) {
use rand::{Rng as _, SeedableRng as _};
let mut rng = rand::rngs::StdRng::seed_from_u64(seed);
@@ -895,6 +900,8 @@ mod test {
test_same_explicit(ref_state, dut_state, step_iters, steps_per_iter);
}
// TODO: port the rest of these tests to the test_backend macro
#[test]
fn mb_ferromagnet_1_step() {
test_same_mb_ferromagnet(0x1234, 1, 1, Index::new(4, 4, 4));