Commit Graph

8 Commits

Author SHA1 Message Date
f8fccd957a coremem_types: IsomorphicConductor, AnisomorphicConductor are now used by both spirv and cpu impls 2022-07-19 02:08:22 -07:00
716e0e12b4 move Ferroxcube3R1MH from spirv_bindings to coremem_types::mat 2022-07-18 15:33:47 -07:00
d005256459 move MBPgram, MHPgram out of spirv_backend into coremem_types::mat
later this can be shared with CPU backend.
2022-07-18 15:27:31 -07:00
b8bcd68b98 spirv_backend: use Real:: constants instead of inlined ones 2022-07-18 15:10:57 -07:00
57338bcb4a migrate Conductor material from spirv_backend to coremem_types 2022-07-18 14:41:27 -07:00
7d2a3baadc spirv: migrate Material trait to types, and parameterize by R 2022-07-18 14:33:09 -07:00
19f00c9076 spirv_backend: remove Vec3Std and use coremem_types::Vec3 everywhere 2022-07-18 13:51:11 -07:00
5b99d30cda restructure this multi-crate project to use Cargo's "workspace" feature
this solves an issue in the Nix build, where managing multiple
Cargo.lock files is otherwise tricky. it causes (or fails to fix?) an adjacent issue where
the spirv builder doesn't seem to have everything it needs vendored.
2022-07-05 17:34:21 -07:00