3dbdead1cb
app: stacked_cores: 48-xx: complete a few more runs
2022-10-21 05:13:28 -07:00
daf50324d7
app: stacked_cores: complete more 48-xx runs
2022-10-21 01:00:46 -07:00
6f57e17bef
app: stacked_cores: 48-xx: add some runs
2022-10-17 06:51:48 -07:00
7c0151220c
app: stacked_cores: new 48-xx sim which varies conductivities on a 2-core buffer
2022-10-17 04:32:30 -07:00
ee74163131
app: stacked_cores: complete a few runs of 46-xx where the output is floating
...
this sohws us that most of the load preventing M1 from switching is due
to us holding its *downstream* core steady.
if we could somehow make it so that the downstream core presented a
lower load to M1, then we could hold it steady while writing M0 -> M1.
this is similar to saying "make M0 -> M1 a circuit that amplifies A >> 1
and make M1 -> M2 a 1:1 circuit". then we can hold M2 low and still get
amplification A - 1.
then the question is how do we get A >> 1?
2022-10-17 03:40:03 -07:00
760dd0070f
app: stacked_cores: complete a few more 46-xx runs
2022-10-16 23:18:33 -07:00
ff2c79162c
app: stacked_cores: 47-xx: cascade two buffers and vary their parameterization
2022-10-16 17:21:10 -07:00
c458b3135b
app: stacked_cores: fix flipped 41-xx measurements
2022-10-16 06:02:13 -07:00
e8adf6eaa7
app: stacked_cores: include intermediate core values in the db for multi-core inverters
2022-10-16 05:20:55 -07:00
3498649312
42-xx: try some > 400um inverters
2022-10-16 04:58:00 -07:00
7ecd8fa881
app: stacked_cores: backfill some 40-xx parameterizations
2022-10-16 04:30:49 -07:00
226e4949d0
app: stacked_cores: minimize what we extrapolate from beyond the measured transfer domain
2022-10-16 04:28:44 -07:00
74858ee247
app: stacked_cores: add aliases for poorly formatted f32 strings
2022-10-16 02:29:31 -07:00
3614d00871
app: stacked_cores: sort all the inverters in the db
2022-10-16 02:12:47 -07:00
bc61fd0d0a
app: stacked_cores: 46-xx: complete some runs of an inverter cascaded into a buffer
...
the results aren't great :'(
2022-10-16 02:00:55 -07:00
33b0b76278
app: stacked_cores: plot what happens when one cascades an inverter into a buffer
2022-10-15 23:26:10 -07:00
d03818b58e
app: stacked_cores: try varying the number of control loops separately from the coupling loops
...
doesn't make a huge difference, apparently.
2022-10-15 21:45:37 -07:00
3a21cf7655
app: stacked_cores: try a 3-core inverter where the 3rd core is initialized LOW
...
theory being that this would placeless load on the intermediary core,
allowing it to transition more. but that wasn't actually the case.
2022-10-15 07:45:14 -07:00
8a3914d56d
app: stacked_cores: factor out the inverter wiring setup
2022-10-14 20:11:58 -07:00
5a61613381
app: stacked_cores: 43-xx: complete more current variations
2022-10-14 19:25:05 -07:00
997ac5f299
app: stacked_cores: 43-xx: complete some 600um runs
2022-10-14 08:18:38 -07:00
8407c2c8e8
app: stacked_cores: 43-xx: run more current variations
2022-10-13 21:53:30 -07:00
196e6c8790
app: stacked_cores: 43-xx: run a few 5x 3:1 current variations
2022-10-13 19:22:58 -07:00
b07da366f1
app: stacked_cores: 43-xx: ingest results
2022-10-13 17:27:16 -07:00
f4d637fc98
app: stacked_cores: new 43-xx experiment where we cascade two asymmetrically-wound inverters
2022-10-12 07:39:02 -07:00
1cfebb73e0
app: stacked_cores: complete a few more 42-xx runs
2022-10-12 03:42:25 -07:00
0bf7b379d6
app: stacked_cores: explore more 4x 7:1 parameterizations
2022-10-11 23:27:40 -07:00
2f097ab1a8
app: stacked_cores: 42-xx: explore more 9x 3:1 parameterizations
2022-10-11 21:26:17 -07:00
f4b21afe58
app: stacked_cores: 42-xx: explore 6x 5:1 parameterizations
2022-10-11 20:25:25 -07:00
0c079585b0
app: stacked_cores: 42-xx: explore some more > 3:1 runs
2022-10-11 18:46:40 -07:00
c6814796e1
app: stacked_cores: 42-xx: conclude a 3e10 drive variant of the 2x 13:1 inverter
2022-10-11 07:25:46 -07:00
09ea393417
app: stacked_cores: 42-xx: run a 2x 13:1 experiment at 2e10 current
2022-10-11 04:32:37 -07:00
e76fd7f045
app: stacked_cores: 42-xx: re-measure 400um 4x 7:1 at 1e10 coupling
2022-10-11 03:29:31 -07:00
ff203011df
app: stacked_cores: 42-xx: explore more runs of the low-current 400um 9x 3:1 parameterization
2022-10-11 02:11:30 -07:00
348042ca00
app: stacked_cores: 42-xx: complete more runs
2022-10-10 22:49:46 -07:00
bab747b97b
app: stacked_cores: 42-xx: complete some runs
...
not all the "inverters" from 41-xx lend themselves to actual, native,
inverters when natively inverted.
2022-10-10 16:45:44 -07:00
197c1ca30d
app: stacked_cores: complete the first 42-xx inverter run
2022-10-10 06:48:27 -07:00
d8eeecfa4e
app: stacked_cores: new grouping: 42-xx: test a native inverter
2022-10-10 05:15:48 -07:00
ff88b18473
Intersection: add a new3 constructor
2022-10-10 04:25:23 -07:00
3e32526099
app: stacked_cores: complete a 400um 9x 3:1 run at 12e9 drive strength
2022-10-10 02:50:50 -07:00
1069f63255
app: stacked_cores: try another 400um 9x 3:1 run with higher current
...
also completed a bunch more detail for adjacent inverters.
2022-10-09 16:59:24 -07:00
c0e2b1ba6c
app: stacked_cores: try a 8e9 drive strength variant of the 400um 3:1 inverter
2022-10-09 06:21:44 -07:00
7150d4c8b3
app: stacked_cores: test some variants of the 400um 6x 5:1 core
2022-10-09 04:56:11 -07:00
8b3b638de1
app: stacked_cores: take more readings for the 400um 5:1 41-xx run
2022-10-09 04:25:05 -07:00
19bf9e2d31
app: stacked_cores: try a 41-xx 400um 4x 7:1 run at 4e10 drive strength
2022-10-09 03:34:31 -07:00
d5f2c75ec7
app: stacked_cores: complete more 41-xx runs of the validated inverters
2022-10-07 14:48:30 -07:00
12d0737c6b
app: stacked_cores: 41-xx: finish more runs of the 1200um 3:1 inverter
2022-10-07 03:20:20 -07:00
7b2bb56e7a
app: stacked_cores: 41-xx: finish the 1200 um 5:1 inverter
2022-10-06 21:47:28 -07:00
972db0d45f
app: stacked_cores: mark (36, 1, um(1200), 4e9) as not a viable inverter
2022-10-06 16:00:22 -07:00
2f9110d858
app: stacked_cores: confirm another inverter: 41-0.0011999999rad-24coupling-5_1_winding-1e10-drive
2022-10-06 03:45:08 -07:00
