fe47eb09f8
driver: rename new_with_state -> new
2022-07-28 01:59:11 -07:00
a6fb21d892
driver: remove SpirvDriver alias
2022-07-28 01:55:22 -07:00
7a6bbf06a5
driver: remove new_spirv method
2022-07-28 01:52:09 -07:00
50af5927df
Optional::unwrap: switch this to a debug assert
2022-07-28 01:51:39 -07:00
c36d70044a
fix benches/driver.rs
...
apparently `cargo build --all` doesn't include this :|
2022-07-27 17:26:22 -07:00
5a0766451d
spirv: relax some : 'static bounds
2022-07-27 17:11:10 -07:00
9e07189b12
SpirvSim: don't always require the backend during construction
2022-07-27 17:04:43 -07:00
920a0b3c9a
spirv backend: remove parameters from WgpuBackend struct
2022-07-27 16:50:51 -07:00
48e8f5d1b4
bench: explicitly specify spirv backend
2022-07-27 16:37:56 -07:00
d5c4e13b84
driver: remove legacy uses
2022-07-27 16:34:50 -07:00
1dd6a068ba
replace 'StaticSim' with the SpirvSim type, material being the Vacuum
2022-07-27 16:22:32 -07:00
dc38457a8b
don't re-export StaticSim from sim/mod.rs
...
this way we can clearly spot the legacy users.
2022-07-27 15:42:18 -07:00
93967485f0
spirv: remove the set_meta method on the SimBackend
...
backend is responsible for procuring its own resources on the first run.
2022-07-27 14:05:17 -07:00
932bb163c3
SpirvSim: explicitly pass the backend in when initialized
2022-07-27 13:53:32 -07:00
7698e0e5ba
spirv: re-order the SimBackend parameters to be more consistent
2022-07-27 12:47:51 -07:00
6b51fcea02
spirv: cpu: inline most of this step logic
2022-07-27 12:42:44 -07:00
d0afca7e3f
spirv: gpu: simplify some of this entry_point passing
2022-07-27 12:39:15 -07:00
b134fd2373
types: Optional: remove the Into/From<Option> impls
...
they're no longer used
2022-07-27 12:34:32 -07:00
568d61c598
spirv: remove the Optionality around entry points: compute them statically with traits
2022-07-27 12:32:43 -07:00
baaeeb9463
spirv_backend: no need to re-export glam
2022-07-27 12:13:01 -07:00
4bb0bc09ad
spirv/cpu.rs: remove unused import
2022-07-27 12:08:31 -07:00
c85bee20f5
replace some assert's with debug_assert's; slightly more optimal Optional impls
2022-07-27 12:07:30 -07:00
f6a585852e
move the dimensioned operations out of the sim adapters and into step.rs
2022-07-26 18:43:41 -07:00
7d16e87b6e
spirv: port all backends to use R for the stimulus
...
particularly, this patches over a difference where the gpu backend
expected the stimulus to be R, while the CPU thought it should be f32.
that would likely have revealed a crash if we had tested it with f64
(TODO).
2022-07-26 18:16:10 -07:00
00dcfb170a
spirv_backend/support.rs: remove the re-export of DimensionedSlice
...
also add some docs
2022-07-26 18:08:03 -07:00
dbd666d272
move the dimensioned indexing out of spirv_backend and into coremem_types
...
this allows us to use it from the CPU implementation.
2022-07-26 18:03:21 -07:00
d93d14d260
spirv_backend: use RuntimeArray to remove all this UnsizedArray stuff
2022-07-26 15:58:23 -07:00
09f7c8acb9
spirv_backend: support: remove unused helpers
2022-07-26 13:36:42 -07:00
6e4133db4d
spirv backend: simplify the adapt.rs indexing by using the constructors previously created
2022-07-26 13:29:39 -07:00
68d8cdde42
move some of the VolumeSample instantiation into step.rs, out of cpu.rs
...
we can go further: the IndexDim type itself can be moved into step.rs -- maybe?
if it were to wrap a generic flat-indexable thing -- either a slice, or
an array ref.
2022-07-26 01:15:53 -07:00
92ab220110
spirv: test: remove legacy cpu-only tests
...
these tests are all covered by the backend-agnostic tests
2022-07-26 00:54:33 -07:00
972e0ba4fb
spirv: test: add TODO for moving the cpu tests to be backend-agnostic
2022-07-25 22:38:10 -07:00
d68c1b20be
spirv: test: port the last rgpu test to be backend-agnostic
2022-07-25 22:37:05 -07:00
a969969449
spirv: test: port mh_ferromagnet tests to backend-agnostic
2022-07-25 22:36:46 -07:00
04c6d05ab0
spirv: test: port mb_ferromagnet tests to be backend-agnostic
2022-07-25 22:28:43 -07:00
dc49cddc97
spirv: test: port conductor tests to backend_agnostic
2022-07-25 22:23:56 -07:00
3fa2c22438
spirv: test: port RngStimulus tests to both backends
2022-07-25 22:19:44 -07:00
a8be7279b3
spirv sim: port rgpu smoke tests to test both Gpu and Cpu backend generically
2022-07-25 21:52:08 -07:00
fee9a1c216
implement a CpuBackend for running the "spirv" simulations
...
UNTESTED
2022-07-25 17:58:22 -07:00
47e11474d2
parameterize SpirvSim over R: Real
2022-07-25 14:49:32 -07:00
a1784da1cf
spirv: parameterize over the SimBackend
2022-07-25 14:27:09 -07:00
b4ee42cfdf
spirv: rename WgpuData -> WgpuBackend
2022-07-25 14:11:58 -07:00
cf42ec2dd1
spirv: SimBackend: remove the Array3 use
2022-07-25 14:11:01 -07:00
567f088f98
spirv: hide the gpu ops behind a SimBackend trait
2022-07-25 13:59:28 -07:00
ff1d9867ab
parameterize WgpuData over the M type
2022-07-25 13:15:41 -07:00
0801a0dca3
spirv: remove bindings.rs
...
the one function which was in here previously is just inlined into
gpu.rs
2022-07-25 13:07:35 -07:00
7cf8ed9a7b
spirv: gpu.rs no longer references the super SpirvSim type
2022-07-25 13:06:00 -07:00
8c8e707407
spirv: move the stimulus application out of gpu.rs
2022-07-25 12:52:35 -07:00
5b8978f0ec
spirv: instantiate the backend in mod.rs, not gpu.rs
2022-07-25 12:47:39 -07:00
bd066331de
spirv: fix indendation
2022-07-25 12:45:07 -07:00
