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1174 Commits

Author SHA1 Message Date
colin 4cc46ae71a README: make this file-path a link 2022-12-07 10:00:15 +00:00
colin beb43843ff app: sr_latch: fix doc-comment to have file scope 2022-12-07 09:58:03 +00:00
colin c06aa7ff36 README: update toolchain docs to match what we actually use 2022-12-07 09:56:36 +00:00
colin bcefd46105 nit: use consistent syntax in material docs 2022-12-07 09:49:06 +00:00
colin 859a7f8b18 rename `FullyGenericMaterial` -> `GenericMaterial` 
this naming was an artifact from the separate CPU/GPU material implementations.
 2022-12-07 09:46:33 +00:00
colin 6d73150fb6 README: fix up stale paths, material references 2022-12-07 09:41:38 +00:00
colin ed55cdfe10 app: stacked_cores: 61-xx: complete more experiments; start ones with only symmetric coupling 2022-11-26 03:42:10 +00:00
colin 1c9527bb63 app: stacked cores: 61-xx: complete more runs 2022-11-24 11:13:53 +00:00
colin 06aaf55e30 app: stacked_cores: 61-xx: more experiments 2022-11-22 12:56:01 +00:00
colin 0d62b60423 app: stacked_cores: 61-xx: complete more runs 2022-11-22 00:25:52 +00:00
colin 7bb8199b02 app: stacked_cores: 61-xx: complete more runs 
still nothing with >> 1.0x amplification.
though we do see configurations which might *locally* amplify:
- 2:1 inp coupling and 4:1 output coupling
        - output is amplified relative to the middle cores
        - but the middle cores transition less than fully
 2022-11-19 11:18:24 +00:00
colin cca6a7c8cd app: stacked_cores: complete more 61-xx runs 2022-11-18 23:54:34 +00:00
colin 9cb9c4dd66 app: stacked_cores: 61-xx: complete a few first-pass runs over an alternatively-parameterized complementary buffer 2022-11-18 10:20:49 +00:00
colin da199568ff app: stacked_cores: 53-xx: do another run with greater asymmetry 
5:1 does worse than 3:1 here
 2022-11-18 02:47:09 +00:00
colin eccd865cf7 app: stacked_cores: 60-xx: new experiment that tries moving a value along a 4-core loop 
it does this in a non-complementary way; and it doesn't get more than
about 0.60 amplification
 2022-11-17 23:28:49 +00:00
colin e13ddbdc1f app: stacked_cores: complete more 59-xx runs 2022-11-17 09:45:19 +00:00
colin 38aa677aad app: stacked_cores: complete some 59-xx runs 
they don't look super insightful/promising.
 2022-11-17 01:17:42 +00:00
colin a2a851b26f app: stacked_cores: 58-xx: try merging cores via a complementary buffer 
results aren't any better than the earlier complementary buffers
 2022-11-16 12:29:27 +00:00
colin 9d4e245388 app: stacked_cores: new 58-xx sim which tries a complementary buffer into a pre-charged output 2022-11-11 22:59:57 +00:00
colin 6e198caaa3 fix "reset" -> "set" typo in SR latch example 2022-11-11 05:28:54 +00:00
colin b7112fab86 app: stacked_cores: 57xx: do some runs where only one pos core is wired 
into the output
 2022-11-11 03:35:24 +00:00
colin ea6799b764 app: stacked_cores: new 57-xx experiment: complementary buffer with doubled inputs 2022-11-10 01:23:02 +00:00
colin 4539cb18fe app: stacked_cores: 56-xx: complete a few more runs 2022-11-09 03:36:04 +00:00
colin 7443599054 app: stacked_cores: new 56-xx sim for complementary logic using multiple input cores 
like 53-xx, but with double the input cores, and a fixed 1:1 coupling.
it achieves 0.9x amplification at best.
- which is *better* than the 0.8 amplification we see with 53-xx when
  using 1:1 coupling, but not enough
- what if we try this idea with 3:1 winding? we can do that if we
  sandwhich each output _between_ its associated input.
 2022-11-09 01:20:15 +00:00
colin df68100f82 app: stacked_cores: define a fork -> join sim 
this is like 18xx, but better measured & with better control/coupling
wirings.

so far we don't have anything > 1.0x amp, but closer to 0.75x
 2022-11-08 09:23:28 +00:00
colin be172d4371 remove the 'license' section 
no need to state my ideals so in-your-face here. better to just omit any talk
of licensing, if i truly believe it to be irrelevant.
 2022-11-07 03:19:53 -08:00
colin 4407a8d3f7 app: stacked_cores: 53-xx: complete some more runs, including one where inputs are uncoupled 2022-11-07 02:46:24 -08:00
colin 16525127a1 app: stacked_cores: 53-xx: complete a run which uses pos-windings != neg-windings 2022-11-05 18:54:10 -07:00
colin af4b5ffa32 app: stacked_cores: 53-xx: complete a 1:1 coupled buffer 
slope is poor, hovering around a constant 0.75 transmission ratio.
 2022-11-05 02:59:10 -07:00
colin 1742172e6c app: stacked_cores: 53-xx: add a 5:1 buffer 
it seems to under-transfer compared to the 3:1 buffers.
this *might* be an issue of drive current -- unclear.
 2022-11-04 06:11:08 -07:00
colin 3ebcc550a0 app: stacked_cores: 53-xx: better constrain the interpolation, and plot slope 2022-11-04 06:10:04 -07:00
colin 373c80793f app: stacked_cores: improve the 52-xx plotting/interpolation 
it's a little slow :-(
i'd guess the `score` function is the slowest part. can maybe get scipy
to do a dot-product for us?
 2022-11-04 03:22:42 -07:00
colin df828b6299 app: stacked_cores: create a plot_53xx and refactor the surroundings 
note that the interpolation is very BAD. i need to figure out better
sampling.
 2022-11-03 21:21:07 -07:00
colin 4023a67912 app: stacked_cores: ingest 53-xx buffer results 2022-11-03 20:26:17 -07:00
colin aee3796c29 app: stacked_cores: note about preservation 2022-11-03 05:46:58 -07:00
colin a45c0c4324 app: stacked_cores: new 53-xx run, where we buffer differential signals 2022-11-03 05:42:38 -07:00
colin 47189dcc7e app: stacked_cores: 52-xx: complete more or gate parameterizations 2022-11-03 04:39:06 -07:00
colin 70e14b4578 app: stacked_cores: 52-xx: sort the runs naturally (natsort) 2022-11-03 01:09:12 -07:00
colin a754b6e01d app: stacked_cores: 52-xx: capture more runs of existing or gates 2022-11-03 01:02:33 -07:00
colin 286a267f75 app: stacked_cores: 52-xx: add some facilities for plotting 52-xx or gate runs 
it's primitive; not the *best* results
 2022-11-02 17:21:29 -07:00
colin ff68e57fa5 app: stacked_cores: 52-xx: collect the measurements into a db 2022-11-02 15:42:49 -07:00
colin 87366cf473 app: stacked_cores: define an "or gate" sim + script for post-processing 
extract transfer characteristics with e.g.
```
extract_meas.py ../../../out/applications/stacked_cores/52-or--0.0004rad-5000ctl_cond-20000coupling_cond-2000ps-100ps-3ctl-3coupling-3_1_winding-49999998976e0-drive- 2e-9 4e-9 8e-9
```
 2022-11-01 00:11:50 -07:00
colin 9d2fbf8b07 app: stacked_cores: expand the 48-xx run set 2022-10-31 20:49:11 -07:00
colin 267a204e7e app: stacked_cores: complete some more 51-xx runs with variable winding ratios 2022-10-29 01:05:51 -07:00
colin fc0ce9f083 app: stacked_cores: 51-xx: try some higher-current variants; schedule some 5:1 and 7:1 inverter runs 2022-10-28 05:18:18 -07:00
colin 0c7df48234 app: stacked_cores: 51-xx: complete some experiments using single-clock cascaded cores 
i'm able to get 0.8x amplification between the first and the third core.
this is *less* than the amplification i got when cascading only one core
of the first, so not likely a good direction to pursue, though i haven't
yet explored that much of the parameter space.
 2022-10-28 02:43:12 -07:00
colin 12f286c3c7 app: stacked_cores: prototype a 3-core/1-cycle inverter (51-xx) 
we vary the conductivities, as with 50-xx. the hope is that with a
multi-core approach like this we might get >> 1.0x amplification in the
unloaded setup, which we can place into a loaded circuit and deal with
the ~70% loading penalty.
 2022-10-27 18:31:39 -07:00
colin 9c17d3b45d app: stacked_cores: conclude 50-xx runs 2022-10-27 18:17:11 -07:00
colin 57e12cbe32 app: stacked_cores: 50-xx: explore some more runs 
got the amplification up to a bit over 0.3...
 2022-10-26 08:08:15 -07:00
colin 6af2d1d9e3 app: stacked_cores: complete some more 50-xx runs 2022-10-25 15:29:33 -07:00